With an increasingly scaling down of a feature size of MOSFET (metal-oxide-semiconductor field-effect transistor), especially a feature size of a gate length, a short-channel effect becomes more and more serious. In order to effectively suppress the short-channel effect, a FinFET is proposed, a channel of which is thin enough and is only disposed at a place very close to a gate thus eliminating all leakage channels apart from the gate. The FinFET, which may greatly improve a control capability of the gate over the channel and effectively suppress the short-channel effect, has advantages of high drive current, low off-state current, high on/off current ratio, low cost and high transistor density. Moreover, the FinFET devices may be fabricated on a cheap Si or Si-on-insulator (SOI) substrate.
In addition, also with the increasingly scaling down of the feature size of MOSFET, a low carrier mobility of Si has become a primary factor restraining a performance of the devices. In order to solve the problem, a material with higher mobility is adopted as the channel material, for example, Ge or Ge1-zSiz (0<z<1) (GeSi) alloy is adopted as the channel material in PMOSFETs, and a group III-V compound semiconductor material is adopted as the channel material in NMOSFETs. A hole mobility of Ge is around four times as great as that of Si, and currently most technical difficulties for a Ge channel MOSFET have been overcome. A group IV semiconductor material Ge-based Ge1-xSnx (0<x<1) (GeSn) alloy compatible with Ge has a good electrical property.
However, it is difficult to directly grow a GeSn alloy with high crystalline quality and high Sn content. The reasons are illustrated as follows. Firstly, an equilibrium solid solubility of Sn in Ge is less than 1% (i.e., about 0.3%); secondly, a surface segregation of Sn easily occurs because the surface energy of Sn is smaller than that of Ge; and thirdly, there is a large lattice mismatch (about 14.7%) between Ge and α-Sn. In order to suppress the surface segregation of Sn and increase the content of Sn, a certain amount of Si may be doped during a growth to form a Ge1-x-ySnxSiy (0<x<1, 0<y<1) (GeSnSi) layer. Because a lattice constant of Si is smaller than that of Ge, but a lattice constant of Sn is larger than that of Ge, a thermal stability of the GeSnSi alloy may be improved by doping Si into it.
It is difficult to fabricate GeSn and GeSnSi since both materials are metastable Ge-based materials. Molecular beam epitaxy (MBE) is conventionally used for growing the GeSn alloy. By using such a method, a GeSn film with high crystal quality may be obtained. Disadvantages (such as expensive equipment, time-consuming fabrication process and high cost) of such a method, however, limit a large scale production. In addition, a uniformity of the film formed by MBE needs to be further improved. Alternatively, chemical vapor deposition (CVD) is also used for growing the GeSn or GeSnSi film but has disadvantages of poor film quality, poor thermal stability and easy segregation of Sn. Moreover, a selective epitaxial growth of the GeSn or GeSnSi films is needed for the FinFET structure. In theory CVD is proper for selectively growing the GeSn or GeSnSi films, however, it is not the case in practice because of disadvantages of poor film quality, immature and complicated process and high cost.